High bandwidth memory typically is a high-performance random-access memory (RAM) interface that includes a stack of dynamic random-access memory (DRAM) having through silicon vias (TSVs) through the DRAM stack. The high bandwidth memory is typically packaged in a specific configuration to enable the high bandwidth memory to be used by another device, such as, but not limited to a graphics card.
FIG. 6 shows a side view schematic of a prior semiconductor device assembly 400 that includes a plurality of hybrid memory cube (HMC) 430 offered by Micron Technology of Boise, Id. The HMC includes multiple memory cells, usually four (4) to eight (8), stacked on top of each other and uses TSVs to interconnect the memory cells. The HMC includes a memory controller, which is integrated as a separate die. Microbumps on a bottom surface of the HMC may be used to connect the HMC to another device, such as, but not limited to, a graphics card.
The semiconductor device assembly 400 includes a substrate, or printed circuit board (PCB), 410 having a first, or top, side 411 and a second, or bottom, side 412, which is opposite of the first side 411. A silicon interposer 420 is connected to the first side 411 of the substrate 410. The interposer 420 has a first, or top, side 421 and a second, or bottom, side 422, which is opposite of the first side 421. A plurality of interconnects 401 on the second side 412 of the substrate 410 may be used to connect the semiconductor device assembly 400 to another device as would be appreciated by one of ordinary skill in the art. The semiconductor device assembly 400 may include a plurality of interconnect elements (not shown) between each component of the semiconductor device assembly 400 as would be appreciated by one of ordinary skill in the art.
A GPU 440 is connected directly to the first side 421 of the interposer 420. The semiconductor device assembly 400 includes at least one HMC 430. For example, four HMC's 430 may be connected to the semiconductor device assembly 400. However, the HMC's 430 are not connected directly to the first side 421 of the interposer 420. Rather, each HMC 430 is connected to a controller, or interface, die 450. Then the assembly comprised of the HMC 430 and the controller die 450 is connected to the interposer 420. The semiconductor device assembly 400 requires a controller die 450 between each HMC 430 and the interposer 420 increasing the cost and/or complexity of the semiconductor device assembly 400.
Additional drawbacks and disadvantages may exist.
While the disclosure is susceptible to various modifications and alternative forms, specific embodiments have been shown by way of example in the drawings and will be described in detail herein. However, it should be understood that the disclosure is not intended to be limited to the particular forms disclosed. Rather, the intention is to cover all modifications, equivalents and alternatives falling within the scope of the disclosure as defined by the appended claims.